1. Field of the Invention
The present invention relates to a limiter circuit, which is to be used in a device such as a pulse radar device.
2. Related Art
In such pulse radar device, a limiter circuit used for a high frequency band such as a microwave band is disposed, for example, between a radar antenna and a radar receiver of the pulse radar device so as to protect the radar receiver by preventing signals of excessively higher level, such as transmission signals leaking during the transmission of radar pulses and such as radar pulse signals reflected from a target existing in a short range, from being applied directly to the radar receiver.
Japanese Patent Laid-open Publication No. H5-235677 (hereinafter referred to as the “Prior Art Document 1”) discloses, especially in FIG. 5, an example case where a PIN diode is used, as such a kind of limiter circuit, for a limiter-element. The above-mentioned example disclosed in the Prior Art Document 1 imparts an impedance matching function to a DC return element of the PIN diode to provide a lower insertion loss, even at a high frequency region, when small signals are inputted.
FIG. 2 also shows an example of the conventional limiter circuit in which an impedance matching is carried out at a predetermined frequency. The limiter circuit is composed of PIN diodes 11 and 12, DC return lines 13 and 14, and a λ/4 (λdenoting a wavelength) transmission line 15 including a signal line (side) conductor 15a and a common line (side) conductor 15b. This limiter circuit also includes a set of input terminals 16, i.e., a signal line (side) input terminal 16a and a common line (side) input terminal 16b, and a set of output terminals 17, i.e., a signal line (side) output terminal 17a and a common line (side) output terminal 17b. 
The PIN diode 11 and the DC return line 13 are connected between the signal line input terminal 16a and the common line input terminal 16b. The PIN diode 11 has an anode, which is connected to the signal line input terminal 16a, and a cathode, which is connected to the common line input terminal 16b. On the other hand, the PIN diode 12 and the DC return line 14 are connected between the signal line output terminal 17a and the common line output terminal 17b. The PIN diode 12 has an anode, which is connected to the signal line output terminal 17a, and a cathode, which is connected to the common line output terminal 17b. Further, the signal line conductor 15a of the transmission line 15 is connected between the signal line input terminal 16a and the signal line-output terminal 17a, and the common line conductor 15b of the transmission line 15 is connected between the common line-input terminal 16b and the common line-output terminal 17b. 
When a high frequency signal of low level is inputted to the set of input terminals 16 (16a, 16b) in the circuit having the above-described configuration, both the two PIN diodes 11 and 12 are made in a non-conducting state, and both the two DC return lines 13 and 14 provide a high impedance against the high frequency signal. As a result, the inputted high frequency signal propagated through the transmission line 15 is transmitted to the set of output terminals 17 (17a, 17b), with almost no occurrence of attenuation.
On the other hand, when a high frequency signal of high level is inputted to the set of input terminals 16, rectified currents 18a and 18b pass through the PIN diodes 11 and 12 via the DC return lines 13 and 14, with the result that both the PIN diodes 11 and 12 are made in a conducting state, and the transmission line 15 provides a high impedance against the high frequency signal. As a result, the inputted high frequency signal is reflected in a large amount, and only a slight amount of high frequency signal is inputted to the set of output terminals 17.
In this manner, the limiter circuit prevents an excessively large amount of signal from being inputted to a device such as a radar receiver, which is connected to the output terminals 17 of the limiter circuit on the downstream side thereof.
However, in the conventional limiter circuit of the structure described above, when the high frequency signal is inputted at a high level to the limiter circuit, such a signal is reflected towards the upstream side of the set of input terminals 16 of the limiter circuit. More specifically, a voltage standing wave ratio of the limiter circuit at the set of input terminals 16 is seriously deteriorated. The reflected signal further travels towards such devices or elements as antenna circuit, distributing circuit, and transmitting/receiving switching circuit, which are connected to the set of input terminals 16 of the limier circuit on the upstream side thereof. When such a signal further advances as being maintained at its high level, it may cause interference with the other high frequency signal system, thus providing an unfavorable influence on the signal processing operation and the signal processing results.
Especially, in an example in which there is provided a plurality of radar receivers in combination with an array antenna, the signal reflected from the limiter circuit may be adversely mixed into an input signal for the other radar receiver via devices, which are connected to the set of input terminals of the limiter circuit on the upstream side thereof, thus causing interference therewith. It is therefore difficult to obtain an expected antenna pattern or antenna gain.